February 20, 2012

Spi Bus: principles and Implementation

Spi stands for "Serial to Peripheral Interface", and it is a hardware and firmware communications protocol industrialized by Motorola and later adopted by everybody. The Spi Bus is used only on the Pcb. I am inescapable some of you will ask: "Why is the Spi Bus used only on the Pcb? What prevents us from using it covering the Pcb area?" The Spi Bus was specially designed to exchange data between varied Ic chips, at very high speeds; say, at 180 Mhz or even more. Due to this high-speed aspect, the Bus lines cannot be too long, because their reactance increases too much, and the Bus becomes unusable. However, if you want, you could use the Spi Bus covering the Pcb at low speeds, but this is not quite practical--the Spi Bus requires 3 or 4 communications lines, which are a bit too many, when compared to 1 or 2 lines normally needed to communicate, efficiently, with field devices settled covering the Pcb.

Anyway, on the Pcb the Spi Bus is very good, because we can roughly attach to the Bus as many Ics (or devices) as we want. Please excuse me for not providing a photograph of the Spi Bus, but rest assured you do not need one: the Spi Bus is so simple that you will understand all things in words.

The next request is: "Why is this Spi Bus particularly useful?" also from exchanging data between varied Ic chips, the Spi Bus is a formula of multiplying microcontroller's pins. In other words, if you have a tiny 8 pins microcontroller, you could control with that petite monster few hundreds of digital Inputs and Outputs. This is impressive, and I am inescapable many doubt my words. Let's construe this.






The Spi Bus contains three lines, and they can be on any normal I/O controller pins. These Bus lines are: Clock, Data-In, and Data-Out. In addition, each Ic associated to the Spi Bus needs an individual Enable line. Things work like this: suppose we have four devices, A, B, C, and D; all of them are wired to the Spi Bus lines, and the Bus itself is wired to seven controller pins--this is 3 Bus lines plus the 4 Enable ones. When we want to send a message to expedient C, we enable its Enable line first, then we send the message serially, one bit at a time. In the same time devices A, B, and D do exactly nothing, because they are not enabled.

The attractiveness with the Spi Bus is, it is Synchronous, meaning, when the controller sends the message to one Ic, it is also able to receive data from that Ic, in the same time. This singular aspect of the Spi protocol is particularly well distinguished for microcontroller-to-microcontroller communications.

Now, we have seen a small 8 pins microcontroller can control 4 devices (Ics) using 7 pins. Taking into inventory one expedient of type A, B, C, or D could have eight or even sixteen I/O ports, this is still far from the hundreds Inputs and Outputs I promised to you. The next gorgeous thing about the Spi Bus is: one expedient Ic can be serialized with many more of the same type! For example, we could have B1, B2, B3, B4, B5, and so on. All Ics of type B# are serialized together, and they need only 4 microcontroller pins to make them work; the Enable line is common to all of them. Next, we can use each expedient of type A, B, C, and D as a group of tens similar Ics.

The enabling speed of each I/O port on the Spi Bus it is slower, when multiplying microcontroller's pins, but all the time take into inventory I/O field devices don't necessarily need speeds of, say 1000 On/Off activations per second each, simply because most of them cannot deal with that speed. However, there are few, very smart firmware techniques like the "barrel-shift" type of functions, which allows us to allege high-speed messaging on the Spi Bus, even if we have hundreds of I/Os. In the same time, the "barrel-shift" functions allow for better time supervision inside microcontroller, so that it has more time to execute other tasks--makes sense to me! To conclude, I believe it is clear now we can, indeed, build hundreds of sufficient I/O lines on a small 8 pins controller.

Further from this normal presentation of the Spi Bus, you should be aware roughly all Ics implement the Spi protocol in a singular way. For detailed and practical applications I suggest you visit my home site at succeed Theorems. There you are going to explore a good tutorial book about working with hardware, firmware--including the "barrel-shift" type of functions--and software design, in general, and about few nice and practical implementations of the Spi Bus in particular.

Many microcontrollers have built-in Spi Bus hardware modules, but I was never interested too much about using them. What I do, I all the time design--on the Pcb and for one microcontroller--one, two or more institution Spi Busses, because my institution implementations are far more flexible. Besides, practical implementation of a institution Spi Bus, both in hardware and in firmware, is truly simple--trust me with this one!

Spi Bus: principles and Implementation

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